SH7727 Datasheet, PDF (823/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Register: HcRhStatus
Bits
Reset R/W
1
0
R
0
0
R/W
Section 24 USB HOST Module
Offset: 50–53
Description
OverCurrentIndicator (OCI)
This bit reports the over-current condition. When this bit is set,
an over-current condition exists. When this bit is cleared, all
power operations are normal. This bit is always 0 when the
over-current protection at each port is carried out.
0: All power operations are normal. (initial value)
1: An over-current condition exists.
(read) LocalPowerStatus (LPS)
The root hub does not support the local power status function.
Therefore, the bit is always read 0.
(write) ClearGlobalPower
This bit is written to 1 to power on (leaves the PortPowerStatus
bit) all ports in global power mode (Power Switching Mode = 0).
This bit clears the PortPowerStatus bit only to the port in which
the PortPowerControlMask bit is not set. Writing a "0" has no
effect.
In the power mode at each port, the PortpowerStatus bit is
cleared to the port in which the PortPowerControlmask bit is not
set. Writing 0, has no effect.
24.2.22 HcRhPortStatus[1:2]
HcRhPortStatus Register ([1]:04000454 [2]:04000458)
This register is reset by the USBRESET state.
HcRhPortStatus 1, 2 registers are used for base-controlling each port and to report the port event.
The lower word is used to reflect the port status while the upper word reflects the status change.
Some status bits have special writing (see below). If an attempt to write to a bit indicating a
change in port status occurs when a transaction in which a token is passed via a handshake is in
progress, the writing to the bit is delayed until the transaction is completed. Always write reserved
bits to 0.
Rev. 5.00 Dec 12, 2005 page 751 of 1034
REJ09B0254-0500