SH7727 Datasheet, PDF (566/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 17 Serial Communication Interface (SCI)
Bits 1 and 0—Clock Enable 1 and 0 (CKE1 and CKE0): These bits select the SCI clock source
and enable or disable clock output from the SCK0 pin. Depending on the combination of CKE1
and CKE0, the SCK0 pin can be used for serial clock output or serial clock input.
The CKE0 setting is valid only when the asynchronous mode and the internal clock are selected
(CKE1 = 0). The CKE0 setting is ignored in the clock synchronous mode, or when an external
clock source is selected (CKE1 = 1). Before selecting the SCI operating mode in the serial mode
register (SCSMR), set CKE1 and CKE0. For further details on selection of the SCI clock source,
see table 17.10 in section 17.3, Operation.
Bit 1: Bit 0:
CKE1 CKE0 Description
0
0
Asynchronous mode
Internal clock, SCK pin used for input pin (input
signal is ignored)^*1
Clock synchronous mode Internal clock, SCK pin used for synchronous clock
output^*1
1
Asynchronous mode
Internal clock, SCK pin used for clock output^*2
Clock synchronous mode Internal clock, SCK pin used for synchronous clock
output
1
0
Asynchronous mode
External clock, SCK pin used for clock input^*3
Clock synchronous mode External clock, SCK pin used for synchronous clock
input
1
Asynchronous mode
External clock, SCK pin used for clock input^*3
Clock synchronous mode External clock, SCK pin used for synchronous clock
input
Notes: 1. Initial value
2. The output clock frequency is the same as the bit rate.
3. The input clock frequency is 16 times the bit rate.
Rev. 5.00 Dec 12, 2005 page 494 of 1034
REJ09B0254-0500