SH7727 Datasheet, PDF (107/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 2 CPU
Table 2.4 Source Register of DSP Operations
Guard Bits
Register Bits
Registers
Instructions
39
32 31
16 15
0
A0, A1
DSP
Fixed-point, PDMSB,
PSHA
40-bit data
Integer
24-bit data
Logical, PSHL, PMULS
16-bit data
Data
transfer
MOVX/Y.W, MOVS.W
MOVS.L
16-bit data
32-bit data
A0G, A1G Data
transfer
MOVS.W
MOVS.L
Data
Data
X0, X1
Y0, Y1
M0, M1
DSP
Fixed-point, PDMSB,
PSHA
Integer
Sign*
Sign*
32-bit data
16-bit data
Logical, PSHL, PMULS
16-bit data
Data
transfer
MOVS.W
MOVS.L
16-bit data
32-bit data
Note: * Sign-extend the data and feed to the ALU
39 32 31
0
A0G
A0
A1G
A1
M0
M1
X0
X1
Y0
Y1
(a) DSP Data Registers
31
87 6 5 4 3 2 1 0
GT Z N V CS [2:0] DC
(b) DSP Status Register (DSR)
Reset status
DSR: All zeros
Others: Undefined
Figure 2.7 DSP Registers
Rev. 5.00 Dec 12, 2005 page 35 of 1034
REJ09B0254-0500