SH7727 Datasheet, PDF (264/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 7 Interrupt Controller (INTC)
Bit 2—BRI2 Interrupt Request (BRI2R): Indicates whether a BRI2 (SCIF) interrupt request is
generated.
Bit 2: BRI2R
0
1
Description
A BRI2 interrupt request is not generated
A BRI2 interrupt request is generated
(Initial value)
Bit 1—RXI2 Interrupt Request (RXI2R): Indicates whether an RXI2 (SCIF) interrupt request is
generated.
Bit 1: RXI2R
0
1
Description
An RXI2 interrupt request is not generated
An RXI2 interrupt request is generated
(Initial value)
Bit 0—ERI2 Interrupt Request (ERI2R): Indicates whether an ERI2 (SCIF) interrupt request is
generated.
Bit 0: ERI2R
0
1
Description
An ERI2 interrupt request is not generated
An ERI2 interrupt request is generated
(Initial value)
7.3.10 Interrupt Request Register 3 (IRR3)
The IRR3 is a 16-bit read-only register that indicates whether PC Card controller, USB Controller
or LCDC interrupt requests are generated. This register is initialized to H'0000 at power-on reset
or manual reset, but is not initialized in standby mode.
Bit: 15
14
13
12
11
10
9
8
LCDCIR PC0SWIR PC0IRIR PC0SCIR PC0CDIR PC0RCIR PC0BWIR PC0BDIR
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
USBHIR USBF0IR USBF1IR AFEIFIR —
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Rev. 5.00 Dec 12, 2005 page 192 of 1034
REJ09B0254-0500