SH7727 Datasheet, PDF (923/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 27 I/O Ports
27.6 Port G
Each pin has an input pullup MOS, which is controlled by Port G Control Register (PGCR) in
PFC.
27.6.1 Port G Data Register (PGDR)
Bit: 7
6
5
4
3
2
1
0
PG7DT — PG5DT PG4DT PG3DT PG2DT PG1DT PG0DT
Initial value: *
*
*
*
*
*
*
*
R/W: R
R
R
R
R
R
R
R
Note: * Undefined
Port G Data Register (PGDR) is an 8-bit read register that stores data for pins PTG7 and PTG5 to
PTG0. PG7DT and PTG5DT to PG0DT bit corresponds to PTG7 and PTG5 to PTG0 pin. When
the pin function is general input port, if the port is read, the corresponding pin level is read. Table
27.5 shows the function of PGDR.
When ASEMD0 is equal to 1, after PGDR is initialized by a power-on reset, the general input port
function (pullup MOS: on) is set as the initial pin function, and the corresponding pin levels are
fetched.
Table 27.5 Read/Write Operation of the Port G Data Register (PGDR)
PGnMD1 PGnMD0 Pin State
Read
Write
0
0
Other function H’00
Ignored (no affect on pin state)
1
Reserved* 

1
0
Input (Pullup Pin state
Ignored (no affect on pin state)
MOS: on)
1
Input (Pullup Pin state
Ignored (no affect on pin state)
MOS: off)
Note: * Operation cannot be guaranteed when this bit it set to “reserved.”
(n = 0 to 5, 7)
Rev. 5.00 Dec 12, 2005 page 851 of 1034
REJ09B0254-0500