SH7727 Datasheet, PDF (628/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 18 Smart Card Interface
Initialize
Clear TE and RE bits in SCSCR to 0 (1)
Clear SCSSR's FER/ERS,
(2)
PER and ORER flags to 0
Set SCSMR's O/E bit to parity,
set CKS1 and CKS0 bits to
(3)
the clock and set C/A
Set SCSMR's SMIF, SDIR,
and SINV bits
(4)
Set value in SCBRR
(5)
Set SCSCR's CKE1 and CKE0 bits
to the clock and clear TIE, RIE, (6)
TE, RE, MPIE, and TEIE bits to 0
Wait
Has a 1-bit
interval elapsed?
Yes
Set SCSCR's
TIE, RIE, TE, and RE bits
No
(7)
End
Note: Numbers refer to the preceding procedure.
Figure 18.5 Initialization Flowchart (Example)
Rev. 5.00 Dec 12, 2005 page 556 of 1034
REJ09B0254-0500