SH7727 Datasheet, PDF (1080/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Appendix A Pin Functions
Table A.5 Pin Status (Burst ROM/Little Endian)
8-Bit Bus Width
Pin
Byte/Word/
Byte Access
Longword Access (Address 2n)
CS6 to CS2, CS0
Enabled
Enabled
RD
R Low
Low
W—
—
RD/WR
R High
High
W—
—
BS
Enabled
Enabled
RAS3
High
High
CAS
High
High
WE0/DQMLL
R High
High
W—
—
WE1/DQMLU/WE
R High
High
W—
—
WE2/DQMUL/ICIORD R High
High
W—
—
WE3/DQMUU/ICIOWR R High
High
W—
—
CE2A
High
High
CE2B
High
High
CKE
WAIT
Disabled
Enabled^*1
Disabled
Enabled^*1
IOIS16
Disabled
Disabled
A25 to A0
Address
Address
D7 to D0
D15 to D8
D31 to D16
Valid data
High-Z^*2
High-Z^*2
Valid data
Invalid data
High-Z^*2
16-Bit Bus Width
Byte Access
Word/Longword
(Address 2n+1)
Access
Enabled
Enabled
Low
Low
—
—
High
High
—
—
Enabled
Enabled
High
High
High
High
High
High
—
—
High
High
—
—
High
High
—
—
High
High
—
—
High
High
High
High
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Disabled
Address
Address
Invalid data
Valid data
Valid data
High-Z^*2
Valid data
High-Z^*2
Rev. 5.00 Dec 12, 2005 page 1008 of 1034
REJ09B0254-0500