SH7727 Datasheet, PDF (29/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

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981 Table 32.12 USB Module Signal Timing
Item
UCLK external input clock
frequency (48 MHz)
Clock rise time
Clock fall time
Duty (tHIGH/tLOW)
Symbol
tFREQ
tR48
tF48
tDUTY
Min
47.9
—
—
90
Max
48.1
2
2
110
Unit
MHz
ns
ns
%
Figure
32.56
Revised Version
Table 32.15 USB Module Signal Timing
Item
UCLK external input clock
frequency (48 MHz)
Clock rise time
Clock fall time
Symbol
tFREQ
tR48
tF48
Min
47.9
—
—
Max
48.1
6
6
Unit
MHz
ns
ns
Figure
32.58
983
985
991,
992
Table 32.15 AFEIF Module Signal Timing
Note: tPCYC is the cycle time (ns) of the
peripheral clock (P clock).
32.3.14 AC Characteristics Measurement
Conditions
• Input pulse level: Vss to 3.0 V (where
RESETP, RESETM, ASEMD0, IRL3 to
IRL0, ADTRG, PINT[15] to PINT[0], CA,
NMI, IRQ5 to IRQ0, CKIO, and MD5 to
MD0 are within VssQ to VccQ)
Table A.1 Pin Functions (cont)
Type
Signal Name
(Initial Status: Bold)
Pin No.
(HQFP)
AFE/USB
digital/port
related
Serial
related
PTM[7]/PINT[7]/
118, 119,
AFE_FS/USB1d_RCV,
120
PTM[6]/PINT[6]/
AFE_RXIN/USB1d_SPEED,
PTM[5]/PINT[5]/
AFE_TXOUT/
USB1d_TXSE0
PTM[4]/PINT[4]/
121
AFE_RDET/
USB1d_TXDMNS
USB1d_SUSPEND
122
SIOMCLK/SCPT[3]
194
SCK_SIO/SCPT[5],
SIOFSYNC/SCPT[6]
RxD0/SCPT[0],
RxD2/SCPT[4]
196, 197
198, 201
I/O
I/I/I/O
Power-
On
Reset
Manual
Reset
Standby
Release/
Open Bus
Privileges
V
I/I/I/O Z(V)/I/Z/O I/I/I/O
I/I/I/O
V
I/I/I/O Z(V)/I/Z/O I/I/I/O
O
O
I/IO
I
IO/IO
I
I/I
Z
O
O
Z/P
Z/K
Z/P
Z/K
Z/I
Z/Z
O
I/P
IO/P
I/Z
Table 32.18 AFEIF Module Signal Timing
Note: tPCYC is the cycle time (ns) of the
peripheral clock (Pφ).
• Input pulse level: VssQ to 3.0 V (where
RESETP, RESETM, ASEMD0, IRL3 to
IRL0, ADTRG, PINT[15] to PINT[0], CA,
NMI, IRQ5 to IRQ0, CKIO, and MD5 to
MD0 are within VssQ to VccQ)
Type
Signal Name
(Initial Status: Bold)
Pin No.
(HQFP)
AFE/USB
digital/port
related
Serial
related
PTM[7]/PINT[7]/
118, 119,
AFE_FS/USB1d_RCV,
120
PTM[6]/PINT[6]/
AFE_RXIN/USB1d_SPEED,
PTM[5]/PINT[5]/
AFE_TXOUT/
USB1d_TXSE0
PTM[4]/PINT[4]/
121
AFE_RDET
USB1d_SUSPEND
122
SIOMCLK/SCPT[3]
194
SCK_SIO/SCPT[5]
196
SIOFSYNC/SCPT[6]
197
RxD0/SCPT[0],
RxD2/SCPT[4]
198, 201
I/O
I/I/I/O
Power-
On
Reset
V
Manual
Reset
Standby
Release/
Open Bus
Privileges
I/I/I/O Z(V)/I/Z/O I/I/I/O
I/I/I
V
O
O
I/IO
I
IO/IO
I
IO/IO
I
I/I
Z
I/I/I Z(V)/I/Z
O
O
Z/P
Z/K
Z/P
Z/K
Z/P
K/K
Z/I
Z/Z
I/I/I
O
I/P
IO/P
IO/P
I/Z
997
Table A.2 Treatment of Unused Pins
(cont)
Type
AFE/USB
digital/port
related
Signal Name (Initial Status:
Bold)
Pin No (HQFP)
PTM[7]/PINT[7]/AFE_FS/
118, 119, 120
USB1d_RCV,
PTM[6]/PINT[6]/AFE_RXIN/
USB1d_SPEED,
PTM[5]/PINT[5]/AFE_TXOUT/
USB1d_TXSE0
PTM[4]/PINT[4]/AFE_RDET/ 121
USB1d_TXDMNS
USB1d_SUSPEND
122
Pin No (CSP)
V19, T18, V18
W19
V16
I/O
Treatment
when Not Used
I/I/I/O Open
I/I/I/O Open
O Open
Type
AFE/USB
digital/port
related
Signal Name
(Initial Status: Bold)
Pin No (HQFP)
PTM[7]/PINT[7]/AFE_FS/
118, 119, 120
USB1d_RCV,
PTM[6]/PINT[6]/AFE_RXIN/
USB1d_SPEED,
PTM[5]/PINT[5]/AFE_TXOUT/
USB1d_TXSE0
PTM[4]/PINT[4]/AFE_RDET 121
Reserved/USB1d_SUSPEND 122
Pin No (CSP)
V19, T18, V18
W19
V16
I/O
Treatment
when Not Used
I/I/I/O Open
I/I/I Open
O Open
Rev. 5.00 Dec 12, 2005 page xxix of lxxii