SH7727 Datasheet, PDF (969/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 30 PC Card Controller (PCC)
Bit 7—PCC0 Software Card Detect Change Interrupt (P0SCDI): A PCC0 software card
detect change interrupt can be generated by writing 1 to this bit. When this bit is set to 1, the same
interrupt as the PCC0 card detect change interrupt (bit 3 set status) occurs if bit 3 (PCC0 card
detect change enable) in the area 6 card status change interrupt enable register (PCC0CSCIER) is
set to 1. If bit 3 is cleared to 0, no interrupt occurs.
Bit 7: P0SCDI
0
1
Description
No software card detect change interrupt occurs for the PC card connected
to area 6
(Initial value)
Software card detect change interrupt occurs for the PC card connected to
area 6
Bit 6—Reserved: Always reads 0. The write value should always be 0.
Bit 5—PCC0IREQ Request (P0IREQ): Indicates the interrupt request for the IREQ pin of the
PC card when the PC card connected to area 6 is the I/O card interface type. The P0IREQ bit is
set to 1 when an interrupt request signal in pulse mode or level mode is input to the IREQ pin.
The mode is selected by bits 5 and 6 (PCC0IREQ interrupt enable bits) in the area 6 card status
change interrupt enable register (PCC0CSCIER). This bit can be cleared to 0 only in pulse mode.
Write 0 to bit 5 to clear the bit to 0. This bit is not changed if 1 is written. In level mode, bit 5 is a
read-only bit which reflects the IREQ pin state (if the IREQ pin is low, 1 is read). This bit always
reads 0 on the IC memory card interface.
Bit 5: IREQ
0
1
Description
No interrupt request on the IREQ pin of the PC card when the PC card is on
the I/O card interface
(Initial value)
An interrupt request on the IREQ pin of the PC card has occurred when the
PC card is on the I/O card interface
Rev. 5.00 Dec 12, 2005 page 897 of 1034
REJ09B0254-0500