SH7727 Datasheet, PDF (307/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 9 Power-Down Modes and Software Reset
9.1.2 Pin Configuration
Table 9.2 lists the pins used for the power-down modes.
Table 9.2 Pin Configuration
Pin Name
Symbol
I/O
Description
Processing state 1 STATUS1 O
Indicate operating state of the processor.
Processing state 0 STATUS0 O
HH: Reset, HL: Sleep mode, LH: Standby mode,
LL: Normal operation
Note: H means high level, and L means low level.
9.1.3 Register Configuration
Table 9.3 shows the configuration of the control register for the power-down modes.
Table 9.3 Register Configuration
Name
Abbreviation R/W Initial Value Address
Access Size
Standby control register STBCR
R/W H'00^*1
H'FFFFFF82 8
Standby control register 2 STBCR2
R/W H'00^*1
H'FFFFFF88 8
Standby control register 3 STBCR3
R/W H'00^*1
H’04000230 8
(H’A4000230)^*2
Software reset register
SRSTR
R/W H'00^*1
H’04000232 8
(H’A4000232)^*2
Notes: 1. Initialized by power-on resets. Not initialized by manual resets but the contents are
held.
2. The addresses in parentheses ( ) should be used when no address translation by the
MMU is involved.
Rev. 5.00 Dec 12, 2005 page 235 of 1034
REJ09B0254-0500