SH7727 Datasheet, PDF (920/1109 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

Section 27 I/O Ports
27.4 Port D
Each pin has an input pullup MOS, which is controlled by Port D Control Register (PDCR) in
PFC.
27.4.1 Port D Data Register (PDDR)
Bit:
Initial value:
R/W:
Note: * Undefined
7
PD7DT
0
R/W
6
PD6DT
*
R
5
PD5DT
0
R/W
4
PD4DT
*
R
3
PD3DT
0
R/W
2
PD2DT
0
R/W
1
PD1DT
0
R/W
0
PD0DT
0
R/W
Port D Data Register (PDDR) is a 6-bit read/write and 2-bit read register that stores data for pins
PTD7 to PTD0. PD7DT to PD0DT bit corresponds to PTD7 to PTD0 pin. When the pin function
is general output port, if the port is read, the value of the corresponding PDDR bit is returned
directly. When the function is general input port, if the port is read, the corresponding pin level is
read. Table 27.3 shows the function of PDDR.
PDDR is initialized to B'0*0*0000 by a power-on reset. After initialization, the general input port
function (pullup MOS: on) is set as the initial pin function, and the corresponding pin levels are
fetched. It retains its previous value in standby mode and sleep mode, and by a manual reset.
Rev. 5.00 Dec 12, 2005 page 848 of 1034
REJ09B0254-0500