AC82G41SLGQ3 Datasheet, PDF (92/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

DRAM Controller Registers (D0:F0)
5.1.8
HDR—Header Type
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/PCI
Eh
00h
RO
8 bits
This register identifies the header layout of the configuration space. No physical
register exists at this location.
Bit
7:0
5.1.9
Access
RO
Default
Value
00h
RST/
PWR
Core
Description
PCI Header (HDR): This field always returns 00h to
indicate that the (G)MCH is a single function device with
standard header layout. Reads and writes to this location
have no effect.
SVID—Subsystem Vendor Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/PCI
2C-2Dh
0000h
R/WO
16 bits
This value is used to identify the vendor of the subsystem.
Bit
15:0
Access
R/WO
Default
Value
0000h
RST/
PWR
Core
Description
Subsystem Vendor ID (SUBVID): This field should be
programmed during boot-up to indicate the vendor of the
system board. After it has been written once, it becomes
read only.
5.1.10
SID—Subsystem Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/PCI
2E-2Fh
0000h
R/WO
16 bits
This value is used to identify a particular subsystem.
Bit
15:0
Access
R/WO
Default
Value
0000h
RST/
PWR
Core
Description
Subsystem ID (SUBID): This field should be
programmed during BIOS initialization. After it has been
written once, it becomes read only.
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