AC82G41SLGQ3 Datasheet, PDF (83/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Register Description
Bit
31
30:24
23:16
15:11
10:8
7:2
1:0
Access &
Default
R/W
0b
R/W
00h
R/W
00h
R/W
000b
R/W
00h
Description
Configuration Enable (CFGE):
0 = Disable
1 = Enable
Reserved
Bus Number: If the Bus Number is programmed to 00h, the target of
the Configuration Cycle is a PCI Bus 0 agent. If this is the case and the
(G)MCH is not the target (i.e., the device number is ≥2), then a DMI
Type 0 Configuration Cycle is generated.
If the Bus Number is non-zero, and does not fall within the ranges
enumerated by device 1’s Secondary Bus Number or Subordinate Bus
Number Register, then a DMI Type 1 Configuration Cycle is generated.
If the Bus Number is non-zero and matches the value programmed into
the Secondary Bus Number Register of device 1, a Type 0 PCI
configuration cycle will be generated on PCI Express.
If the Bus Number is non-zero, greater than the value in the Secondary
Bus Number register of device 1 and less than or equal to the value
programmed into the Subordinate Bus Number Register of device 1, a
Type 1 PCI configuration cycle will be generated on PCI Express.
This field is mapped to byte 8 [7:0] of the request header format during
PCI Express Configuration cycles and A[23:16] during the DMI Type 1
configuration cycles.
Device Number: This field selects one agent on the PCI bus selected by
the Bus Number. When the Bus Number field is “00” the (G)MCH
decodes the Device Number field. The (G)MCH is always Device Number
0 for the Host bridge entity, Device Number 1 for the Host-PCI Express
entity. Therefore, when the Bus Number =0 and the Device Number
equals 0, 1, or 2 the internal (G)MCH devices are selected.
This field is mapped to byte 6 [7:3] of the request header format during
PCI Express Configuration cycles and A [15:11] during the DMI
configuration cycles.
Function Number: This field allows the configuration registers of a
particular function in a multi-function device to be accessed. The
(G)MCH ignores configuration cycles to its internal devices if the function
number is not equal to 0 or 1.
This field is mapped to byte 6 [2:0] of the request header format during
PCI Express Configuration cycles and A[10:8] during the DMI
configuration cycles.
Register Number: This field selects one register within a particular
Bus, Device, and Function as specified by the other fields in the
Configuration Address Register.
This field is mapped to byte 7 [7:2] of the request header format during
PCI Express Configuration cycles and A[7:2] during the DMI
Configuration cycles.
Reserved
Datasheet
83