AC82G41SLGQ3 Datasheet, PDF (496/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Intel^® Virtualization Technology for Directed I/O Registers (D0:F0) (Intel^® 82Q45 GMCH Only)
Bit
Access
Default
Value
RST/PWR
Description
5
RO
Caching Hints (CH):
0 = Hardware does not support IOTLB caching hints (ALH
and EH fields in context-entries are treated as
reserved).
0b
Core
1 = Hardware supports IOLTB caching hints through the
ALH and EH fields in context-entries.
4
RO
NOTE: This field is reserved as this feature is not
supported.
Extended Interrupt Mode (EIM):
0 = Hardware supports only 8-bit APICIDs (Legacy
Interrupt Mode) on Intel®64 and IA-32 platforms and
16-bit APIC-IDs on ItaniumTM platforms.
0b
Core
1 = Hardware supports Extended Interrupt Mode (32-bit
APIC-IDs) on Intel®64 platforms. This field is valid
only when the IR field is reported as Set.
3
RO
NOTE: This field is reserved as this feature is not
supported.
Interrupt Remapping Support (IR):
0 = Hardware does not support interrupt remapping.
1 = Hardware supports interrupt remapping.
0b
Core
Implementations reporting this field as Set must also
support Queued Invalidation (QI = 1b).
2
RO
NOTE: This field is reserved as this feature is not
supported.
Device IOTLB Support (DI):
0 = Hardware does not support device-IOTLBs.
1 = Hardware supports Device-IOTLBs.
0b
Core
Implementations reporting this field as Set must also
support Queued Invalidation (QI = 1b).
1
RO
0
RO
NOTE: This field is reserved as this feature is not
supported.
Queued Invalidation Support (QI):
0 = Hardware does not support queued invalidations.
0b
Core
1 = Hardware supports queued invalidations.
NOTE: This field is reserved as this feature is not
supported.
Coherency (C):
0 = Indicates hardware accesses to root, context and
page-table structures are not coherent (non-snooped).
0b
Core
1 = Indicates hardware accesses to root, context and
page-table structures are coherent (snooped).
Hardware writes to the advanced fault log is required to be
coherent.
496
Datasheet