AC82G41SLGQ3 Datasheet, PDF (221/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Direct Memory Interface Registers (DMIBAR)
7.3
Bit
31:24
23:8
7:0
7.4
Bit
15:4
3:1
DMIPVCCAP2—DMI Port VC Capability Register 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/DMIBAR
8-Bh
00000000h
RO
32 bits
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
Access
RO
RO
RO
Default
Value
00h
0000h
00h
RST/PWR
Description
Core
Core
Core
Reserved for VC Arbitration Table Offset:
Reserved
Reserved for VC Arbitration Capability (VCAC):
DMIPVCCTL—DMI Port VC Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/DMIBAR
C-Dh
0000h
RO, R/W
16 bits
Access
RO
R/W
Default
Value
000h
000b
RST/PWR
Description
Core
Core
Reserved
VC Arbitration Select (VCAS): This field will be
programmed by software to the only possible value as
indicated in the VC Arbitration Capability field.
The value 000b when written to this field will indicate the
VC arbitration scheme is hardware fixed (in the root
complex). This field cannot be modified when more than
one VC in the LPVC group is enabled.
000 = Hardware fixed arbitration scheme (e.g, Round
Robin)
Others = Reserved
See the PCI express specification for more details
Datasheet
221