AC82G41SLGQ3 Datasheet, PDF (210/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Host-PCI Express* Registers (D1:F0)
6.1.43
SLOTSTS—Slot Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/1/0/PCI
BA-BBh
0000h
RO, R/WC
16 bits
PCI Express Slot related registers allow for the support of Hot Plug.
Bit
15:9
8:7
6
5:4
3
2:0
Access
RO
RO
Default
Value
0000000b
00b
RO
0b
RO
R/WC
RO
00b
0b
000b
RST/
PWR
Core
Core
Core
Core
Core
Core
Description
Reserved and Zero: For future R/WC/S
implementations; software must use 0 for writes to bits.
Reserved
Presence Detect State (PDS): In band presence detect
state:
0 = Slot Empty
1 = Card present in slot
This bit indicates the presence of an adapter in the slot,
reflected by the logical "OR" of the Physical Layer in-band
presence detect mechanism and, if present, any out-of-
band presence detect mechanism defined for the slot's
corresponding form factor. Note that the in-band presence
detect mechanism requires that power be applied to an
adapter for its presence to be detected. Consequently,
form factors that require a power controller for hot-plug
must implement a physical pin presence detect
mechanism.
This bit must be implemented on all Downstream Ports
that implement slots. For Downstream Ports not connected
to slots (where the Slot Implemented bit of the PCI
Express Capabilities Register is 0b), this bit must return
1b.
Reserved
Presence Detect Changed (PDC): A pulse indication
that the inband presence detect state has changed.
This bit is set when the value reported in Presence Detect
State is changed.
Reserved
210
Datasheet