AC82G41SLGQ3 Datasheet, PDF (282/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Integrated Graphics Registers (Device 2) (Intel^® 82Q45, 82Q43, 82B43, 82G45, 82G43, 82G41
GMCH Only)
9.1.10
GTTMMADR—Graphics Translation Table, Memory Mapped
Range Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/2/0/PCI
10-17h
0000000000000004h
R/W, RO
64 bits
This register requests allocation for combined Graphics Translation Table Modification
Range and Memory Mapped Range. The space is 4 MB combined for MMIO and Global
GTT table aperture (512 KB for MMIO and 2 MB for GTT). GTTADR will be at
(GTTMMADR + 2 MB) while the MMIO base address will be the same as GTTMMADR.
For the Global GTT, this range is defined as a memory BAR in graphics device
configuration space is an alias with which software is required to write values (PTEs)
into and may also read values from the global Graphics Translation Table (GTT). PTEs
cannot be written directly into the global GTT memory area.
The device snoops writes to this region in order to invalidate any cached translations
within the various TLBs implemented on-chip. There are some exceptions to this.
The allocation is for 4 MB and the base address is defined by bits [35:22].
Bit
63:36
35:22
21:4
3
2:1
0
Access
R/W
R/W
RO
RO
RO
RO
Default
Value
0000000h
0000h
00000h
0b
10b
0b
RST/PWR
Description
FLR, Core
FLR, Core
Core
Core
Core
Core
(MBA): This field must be set to 0 since addressing above
64 GB is not supported.
Memory Base Address (MBA): This field is set by the
OS, these bits correspond to address signals [35:22].
4 MB combined for MMIO and Global GTT table aperture
(512 KB for MMIO and 2 MB for GTT).
Reserved: Hardwired to 0s to indicate at least 4 MB
address range.
Prefetchable Memory (PREFMEM): Hardwired to 0 to
prevent prefetching.
Memory Type (MEMTYP):
00 = Indicates 32 bit base address
01 = Reserved
10 = Indicates 64 bit base address
11 = Reserved
Memory/IO Space (MIOS): Hardwired to 0 to indicate
memory space.
282
Datasheet