AC82G41SLGQ3 Datasheet, PDF (523/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Intel^® Virtualization Technology for Directed I/O Registers (D0:F0) (Intel^® 82Q45 GMCH Only)
Bit
Access
63:36
RO/P
35:32
RO/P
31:12
RO/P
11:0
RO
Default
Value
0s
0h
0s
0s
RST/PWR
Description
Core
Core
Core
Core
Fault Info (FI): When the Fault Reason (FR) field
indicates one of the DMA-remapping fault conditions, bits
63:12 of this field contains the page address in the faulted
DMA request. Hardware treat bits 63:N as reserved (0),
where N is the maximum guest address width (MGAW)
supported.
When the Fault Reason (FR) field indicates one of the
interrupt-remapping fault conditions, bits 63:48 of this
field indicate the interrupt_index computed for the faulted
interrupt request, and bits 47:12 are cleared.
This field is relevant only when the F field is Set.
Fault Info (FI): When the Fault Reason (FR) field
indicates one of the DMA-remapping fault conditions, bits
63:12 of this field contains the page address in the faulted
DMA request. Hardware treat bits 63:N as reserved (0),
where N is the maximum guest address width (MGAW)
supported.
When the Fault Reason (FR) field indicates one of the
interrupt-remapping fault conditions, bits 63:48 of this
field indicate the interrupt_index computed for the faulted
interrupt request, and bits 47:12 are cleared.
This field is relevant only when the F field is Set.
Fault Info (FI): When the Fault Reason (FR) field
indicates one of the DMA-remapping fault conditions, bits
63:12 of this field contains the page address in the faulted
DMA request. Hardware treat bits 63:N as reserved (0),
where N is the maximum guest address width (MGAW)
supported.
When the Fault Reason (FR) field indicates one of the
interrupt-remapping fault conditions, bits 63:48 of this
field indicate the interrupt_index computed for the faulted
interrupt request, and bits 47:12 are cleared.
This field is relevant only when the F field is Set.
Reserved
§§
Datasheet
523