AC82G41SLGQ3 Datasheet, PDF (283/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Integrated Graphics Registers (Device 2) (Intel^® 82Q45, 82Q43, 82B43, 82G45, 82G43, 82G41
GMCH Only)
9.1.11
GMADR—Graphics Memory Range Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/2/0/PCI
18-1Fh
000000000000000Ch
R/W, RO, R/W/L
64 bits
IGD graphics memory base address is specified in this register.
Bit
63:36
35:29
28
27
26:4
3
2:1
0
Access
R/W
R/W
R/W/L
R/W/L
RO
RO
RO
RO
Default
Value
0000000h
0000000b
0b
0b
000000h
1b
10b
0b
RST/PWR
Description
FLR, Core
FLR, Core
FLR, Core
FLR, Core
Core
Core
Core
Core
Memory Base Address (MBA2): This field is set by the
OS, these bits correspond to address signals 63:36.
Memory Base Address (MBA): This field is set by the
OS, these bits correspond to address signals 35:29.
512MB Address Mask (512ADMSK): This Bit is either
part of the Memory Base Address (R/W) or part of the
Address Mask (RO), depending on the value of MSAC[2:1].
See MSAC (Device 2, Function 0, offset 62h) for details.
256 MB Address Mask (256ADMSK): This bit is either
part of the Memory Base Address (R/W) or part of the
Address Mask (RO), depending on the value of MSAC[2:1].
See MSAC (Device 2, Function 0, offset 62h) for details.
Address Mask (ADM): Hardwired to 0s to indicate at
least 128 MB address range.
Prefetchable Memory (PREFMEM): Hardwired to 1 to
enable prefetching.
Memory Type (MEMTYP):
00 = Indicates 32-bit address.
10 = Indicates 64-bit address
Memory/IO Space (MIOS): Hardwired to 0 to indicate
memory space.
Datasheet
283