AC82G41SLGQ3 Datasheet, PDF (224/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Direct Memory Interface Registers (DMIBAR)
7.8
Bit
31:16
15
14:8
7:0
7.9
DMIVC1RCAP—DMI VC1 Resource Capability
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/DMIBAR
1C-1Fh
00008001h
RO
32 bits
Access
RO
RO
RO
RO
Default
Value
0s
1b
00h
01h
RST/PWR
Description
Core
Core
Core
Core
Reserved
Reject Snoop Transactions (REJSNPT):
0 = Transactions with or without the No Snoop bit set
within the TLP header are allowed on this VC.
1 = When Set, any transaction for which the No Snoop
attribute is applicable but is not Set within the TLP
Header will be rejected as an Unsupported Request.
Reserved
Port Arbitration Capability (PAC): Having only bit 0 set
indicates that the only supported arbitration scheme for
this VC is non-configurable hardware-fixed.
DMIVC1RCTL1—DMI VC1 Resource Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/DMIBAR
20-23h
01000000h
R/W, RO
32 bits
This register controls the resources associated with PCI Express Virtual Channel 1.
224
Datasheet