AC82G41SLGQ3 Datasheet, PDF (9/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

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Integrated Graphics Registers (Device 2) (Intel^® 82Q45, 82Q43, 82B43, 82G45,
82G43, 82G41 GMCH Only) .................................................................................... 275
9.1 Integrated Graphics Registers (D2:F0) ............................................................... 275
9.1.1 VID2—Vendor Identification................................................................... 277
9.1.2 DID2—Device Identification ................................................................... 277
9.1.3 PCICMD2—PCI Command ...................................................................... 278
9.1.4 PCISTS2—PCI Status ............................................................................ 279
9.1.5 RID2—Revision Identification ................................................................. 280
9.1.6 CC—Class Code.................................................................................... 280
9.1.7 CLS—Cache Line Size............................................................................ 281
9.1.8 MLT2—Master Latency Timer ................................................................. 281
9.1.9 HDR2—Header Type ............................................................................. 281
9.1.10 GTTMMADR—Graphics Translation Table, Memory Mapped Range Address ... 282
9.1.11 GMADR—Graphics Memory Range Address............................................... 283
9.1.12 IOBAR—I/O Base Address ..................................................................... 284
9.1.13 SVID2—Subsystem Vendor Identification................................................. 284
9.1.14 SID2—Subsystem Identification ............................................................. 285
9.1.15 ROMADR—Video BIOS ROM Base Address................................................ 285
9.1.16 CAPPOINT—Capabilities Pointer .............................................................. 285
9.1.17 INTRLINE—Interrupt Line ...................................................................... 286
9.1.18 INTRPIN—Interrupt Pin ......................................................................... 286
9.1.19 MINGNT—Minimum Grant...................................................................... 286
9.1.20 MAXLAT—Maximum Latency .................................................................. 287
9.1.21 CAPID0—Capability Identifier ................................................................. 287
9.1.22 MGGC—GMCH Graphics Control Register ................................................. 288
9.1.23 DEVEN—Device Enable.......................................................................... 290
9.1.24 SSRW—Software Scratch Read Write ...................................................... 292
9.1.25 BSM—Base of Stolen Memory ................................................................ 292
9.1.26 HSRW—Hardware Scratch Read Write ..................................................... 292
9.1.27 MC—Message Control............................................................................ 293
9.1.28 MA—Message Address........................................................................... 293
9.1.29 MD—Message Data ............................................................................... 294
9.1.30 GDRST—Graphics Debug Reset .............................................................. 294
9.1.31 PMCAPID—Power Management Capabilities ID.......................................... 295
9.1.32 PMCAP—Power Management Capabilities ................................................. 295
9.1.33 PMCS—Power Management Control/Status............................................... 296
9.1.34 SWSMI—Software SMI .......................................................................... 296
9.2 Integrated Graphics Registers (D2:F1) ............................................................... 297
9.2.1 VID2—Vendor Identification................................................................... 298
9.2.2 DID2—Device Identification ................................................................... 298
9.2.3 PCICMD2—PCI Command ...................................................................... 299
9.2.4 PCISTS2—PCI Status ............................................................................ 300
9.2.5 RID2—Revision Identification ................................................................. 301
9.2.6 CC—Class Code Register ....................................................................... 301
9.2.7 CLS—Cache Line Size............................................................................ 302
9.2.8 MLT2—Master Latency Timer ................................................................. 302
9.2.9 HDR2—Header Type ............................................................................. 302
9.2.10 MMADR—Memory Mapped Range Address................................................ 303
9.2.11 SVID2—Subsystem Vendor Identification................................................. 303
9.2.12 SID2—Subsystem Identification ............................................................. 304
9.2.13 ROMADR—Video BIOS ROM Base Address................................................ 304
9.2.14 CAPPOINT—Capabilities Pointer .............................................................. 304
9.2.15 MINGNT—Minimum Grant...................................................................... 305
9.2.16 MAXLAT—Maximum Latency .................................................................. 305
9.2.17 CAPID0—Mirror of Dev0 Capability Identifier ............................................ 305
Datasheet
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