AC82G41SLGQ3 Datasheet, PDF (172/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

DRAM Controller Registers (D0:F0)
5.3.5
EPLE2A—EP Link Entry 2 Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/PXPEPBAR
68-6Fh
0000000000008000h
RO
64 bits
This register provides the second part of a Link Entry, which declares an internal link to
another Root Complex Element.
Bit
63:28
27:20
19:15
14:12
11:0
Access
RO
RO
RO
RO
RO
Default
Value
RST/PWR
Description
000000000h
00h
00001b
000b
000h
Core
Core
Core
Core
Core
Reserved for Configuration Space Base Address: Not
required if root complex has only one config space.
Bus Number (BUSN):
Device Number (DEVN): The target for this link is PCI
Express x16 port PEG0 (Device 1).
Function Number (FUNN):
Reserved
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