AC82G41SLGQ3 Datasheet, PDF (473/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Intel^® Virtualization Technology for Directed I/O Registers (D0:F0) (Intel^® 82Q45 GMCH Only)
Bit
Access
Default
Value
RST/PWR
Description
2
RO
Advanced Fault Overflow (AFO): Hardware sets this
field to indicate advanced fault log overflow condition. At
this time, a fault event is generated based on the
programming of the Fault Event Control register.
0b
Core
Software writing 1 to this field clears it. Hardware
implementations not supporting advanced fault logging
implement this bit as Reserved.
1
RO/P
0h
0
R/WC/P
0h
Core
Core
NOTE: This field is reserved as this feature is not
supported.
Primary Pending Fault (PPF): This field indicates if
there are one or more pending faults logged in the fault
recording registers. Hardware computes this field as the
logical OR of Fault (F) fields across all the fault recording
registers of this DMA-remapping hardware unit.
0 = No pending faults in any of the fault recording
registers
1 = One or more fault recording registers has pending
faults. The FRI field is updated by hardware whenever
the PPF field is set by hardware. Also, depending on
the programming of Fault Event Control register, a
fault event is generated when hardware sets this field.
Primary Fault Overflow (PFO): Hardware sets this field
to indicate overflow of fault recording registers. Software
writing 1 clears this field.
12.2.9
FECTL_REG—Fault Event Control Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/DMIVC1REMAP
38-3Bh
80000000h
RO, R/W
32 bits
This register specifies the fault event interrupt message control bits.
Bit
Access
Default
Value
RST/PWR
Description
Interrupt Mask (IM):
0 = No masking of interrupt. When a interrupt condition is
detected, hardware issues an interrupt message (using
the Fault Event Data & Fault Event Address register
31
R/W
1h
Core
values).
1 = This is the value on reset. Software may mask
interrupt message generation by setting this field.
Hardware is prohibited from sending the interrupt
message when this field is set.
Datasheet
473