AC82G41SLGQ3 Datasheet, PDF (116/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

DRAM Controller Registers (D0:F0)
5.1.32
Note:
GBSM—Graphics Base of Stolen Memory (Intel^® 82Q45,
82Q43, 82B43, 82G45, 82G43, 82G41 GMCH Only)
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/PCI
A4-A7h
00000000h
R/W/L, RO
32 bits
This register contains the base address of graphics data stolen DRAM memory. BIOS determines
the base of graphics data stolen memory by subtracting the graphics data stolen memory size (PCI
Device 0, offset 52h, bits 6:4) from TOLUD (PCI Device 0, offset B0h, bits 15:4).
This register is locked and becomes Read Only when the D_LCK bit in the SMRAM register is set.
Bit
Access
31:20
R/W/L
Default
Value
000h
RST/PWR
Description
Core
Graphics Base of Stolen Memory (GBSM): This register
contains bits 31:20 of the base address of stolen DRAM
memory. BIOS determines the base of graphics stolen
memory by subtracting the graphics stolen memory size
(PCI Device 0, offset 52h, bits 6:4) from TOLUD (PCI
Device 0, offset B0h, bits 15:4).
19:0
5.1.33
NOTE: This register is locked and becomes Read Only
when the D_LCK bit in the SMRAM register is set.
RO
00000h
Core
Reserved
BGSM—Base of GTT stolen Memory (Intel^® 82Q45, 82Q43,
82B43, 82G45, 82G43, 82G41 GMCH Only)
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/PCI
A8-ABh
00000000h
R/W/L, RO
32 bits
This register contains the base address of stolen DRAM memory for the GTT. BIOS
determines the base of GTT stolen memory by subtracting the GTT graphics stolen
memory size (PCI Device 0, offset 52h, bits 9:8) from the graphics stolen memory base
(PCI Device 0, offset A4h, bits 31:20).
Note:
This register is locked and becomes Read Only when the D_LCK bit in the SMRAM
register is set.
Bit
Access
31:20
R/W/L
Default
Value
000h
RST/PWR
Description
Core
Graphics Base of Stolen Memory (GBSM): This
register contains bits 31:20 of the base address of stolen
DRAM memory. BIOS determines the base of graphics
stolen memory by subtracting the graphics stolen memory
size (PCI Device 0, offset 52h, bits 9:8) from the graphics
stolen memory base (PCI Device 0, offset A4h, bits
31:20).
19:0
RO
00000h
Core
NOTE: This register is locked and becomes Read Only
when the D_LCK bit in the SMRAM register is set.
Reserved
116
Datasheet