AC82G41SLGQ3 Datasheet, PDF (196/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Host-PCI Express* Registers (D1:F0)
6.1.28
SS—Subsystem ID and Subsystem Vendor ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/1/0/PCI
8C-8Fh
00008086h
R/WO
32 bits
System BIOS can be used as the mechanism for loading the SSID/SVID values. These
values must be preserved through power management transitions and a hardware
reset.
Bit
31:16
Access
R/WO
15:0
R/WO
Default
Value
0000h
8086h
RST/PWR
Description
Core
Core
Subsystem ID (SSID): This field identifies the particular
subsystem and is assigned by the vendor.
Subsystem Vendor ID (SSVID): This field identifies the
manufacturer of the subsystem and is the same as the
vendor ID which is assigned by the PCI Special Interest
Group.
6.1.29
MSI_CAPID—Message Signaled Interrupts Capability ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/1/0/PCI
90-91h
A005h
RO
16 bits
When a device supports MSI, it can generate an interrupt request to the processor by
writing a predefined data item (a message) to a predefined memory address.
The reporting of the existence of this capability can be disabled by setting MSICH
(CAPL[0] @ 7Fh). In that case walking this linked list will skip this capability and
instead go directly from the PCI PM capability to the PCI Express capability.
Bit
15:8
7:0
Access
RO
RO
Default
Value
A0h
05h
RST/PWR
Description
Core
Core
Pointer to Next Capability (PNC): This field contains a
pointer to the next item in the capabilities list which is the
PCI Express capability.
Capability ID (CID): Value of 05h identifies this linked
list item (capability structure) as being for MSI registers.
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Datasheet