AC82G41SLGQ3 Datasheet, PDF (335/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Intel^® Manageability Engine Subsystem Registers
10.2.14 MLAT— Maximum Latency
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/3/1/PCI
3Fh
00h
RO
8 bits
Bit
Access
Default
Value
RST/PWR
Description
7:0
RO
00h
Core
Latency (LAT): Not implemented, hardwired to 0.
10.2.15 HFS— Host Firmware Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/3/1/PCI
40-43h
00000000h
RO
32 bits
Bit
31:0
Access
RO
Default
Value
00000000h
RST/PWR
Description
Core
Firmware Status Host Access (FS_HA): This field
indicates current status of the firmware for the HECI
controller. This field is the host's read only access to the FS
field in the ME Firmware Status AUX register.
10.2.16 PID— PCI Power Management Capability ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/3/1/PCI
50-51h
8C01h
RO
16 bits
Bit
15:8
7:0
Access
RO
RO
Default
Value
8Ch
01h
RST/PWR
Description
Core
Core
Next Capability (NEXT): This field indicates the location
of the next capability item in the list. This is the Message
Signaled Interrupts capability.
Cap ID (CID): This field indicates that this pointer is a PCI
power management.
Datasheet
335