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AC82G41SLGQ3 Datasheet, PDF (165/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family
DRAM Controller Registers (D0:F0)
5.2.47
TIS—Thermal Interrupt Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/MCHBAR
CEA-CEBh
0000h
R/WC, RO
16 bits
This register is used to report which specific error condition resulted in the Device 0
Function 0 ERRSTS[Thermal Sensor event for SMI/SCI/SERR] or memory mapped IIR
Thermal Event. Software can examine the current state of the thermal zones by
examining the TSS. Software can distinguish internal or external Trip Event by
examining EXTTSCS.
Software must write a 1 to clear the status bits in this register.
The Following scenario is possible:
An interrupt is initiated on a rising temperature trip, the appropriate DMI cycles are
generated, and eventually the software services the interrupt and sees a rising
temperature trip as the cause in the status bits for the interrupts. Assume that the
software then goes and clears the local interrupt status bit in the TIS register for
that trip event. It is possible at this point that a falling temperature trip event occurs
before the software has had the time to clear the global interrupts status bit. But
since software has already looked at the status register before this event happened,
software may not clear the local status flag for this event. Therefore, after the global
interrupt is cleared by software, software must look at the instantaneous status in
the TSS register.
All bits in this register are reset to their defaults by PLTRST#.
Bit
15:10
Access
RO
9
R/WC
8
R/WC
7
R/WC
6:5
RO
Default
Value
00h
0b
0b
0b
00b
RST/PWR
Description
Core
Core
Core
Core
Core
Reserved
Was Catastrophic Thermal Sensor Interrupt Event
(WCTSIE):
1 = Indicates a Catastrophic Thermal Sensor trip based on
a higher to lower temperature transition through the
trip point
0 = No trip for this event
Was Hot Thermal Sensor Interrupt Event (WHTSIE):
1 = Indicates a Hot Thermal Sensor trip based on a higher
to lower temperature transition through the trip point
0 = No trip for this event
Was Aux0 Thermal Sensor Interrupt Event
(WA0TSIE):
1 = Indicates an Aux0 Thermal Sensor trip based on a
higher to lower temperature transition through the trip
point
0 = No trip for this event Software must write a 1 to clear
this status bit.
Reserved
Datasheet
165