AC82G41SLGQ3 Datasheet, PDF (150/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

DRAM Controller Registers (D0:F0)
5.2.29
EPC0DRB1—EP Channel 0 DRAM Rank Boundary Address 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/MCHBAR
A02-A03h
0000h
RO, R/W
16 bits
See C0DRB0 register for description.
Bit
15:10
9:0
Access
RO
R/W
Default
Value
000000b
000h
RST/PWR
Description
Core
Core
Reserved
Channel 0 Dram Rank Boundary Address 1
(C0DRBA1):
5.2.30
EPC0DRB2—EP Channel 0 DRAM Rank Boundary Address 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/MCHBAR
A04-A05h
0000h
RO, R/W
16 bits
See C0DRB0 register for description.
Bit
15:10
9:0
Access
RO
R/W
Default
Value
000000b
000h
RST/PWR
Description
Core
Core
Reserved
Channel 0 DRAM Rank Boundary Address 2
(C0DRBA2):
5.2.31
EPC0DRB3—EP Channel 0 DRAM Rank Boundary Address 3
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/MCHBAR
A06-A07h
0000h
R/W, RO
16 bits
See C0DRB0 register for description.
Bit
15:10
9:0
Access
RO
R/W
Default
Value
000000b
000h
RST/
PWR
Core
Core
Description
Reserved
Channel 0 DRAM Rank Boundary Address 3
(C0DRBA3):
150
Datasheet