AC82G41SLGQ3 Datasheet, PDF (264/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Host-Secondary PCI Express* Bridge Registers (D6:F0) (Intel^® 82P45 MCH Only)
8.43
SLOTSTS—Slot Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/6/0/PCI
BA–BBh
0000h
RO, RWC
16 bits
PCI Express Slot related registers.
Bit
15:7
6
5:4
3
2
1
0
Access
RO
Default
Value
0000000b
RO
0b
RO
00b
RWC
0b
RO
0b
RO
0b
RO
0b
RST/
PWR
Core
Core
Core
Core
Core
Core
Core
Description
Reserved
Presence Detect State (PDS): This bit indicates the presence of
an adapter in the slot, reflected by the logical "OR" of the Physical
Layer in-band presence detect mechanism and, if present, any out-
of-band presence detect mechanism defined for the slot's
corresponding form factor. Note that the in-band presence detect
mechanism requires that power be applied to an adapter for its
presence to be detected.
0 = Slot Empty
1 = Card Present in Slot
This register must be implemented on all Downstream Ports that
implement slots. For Downstream Ports not connected to slots
(where the Slot Implemented bit of the PCI Express Capabilities
Register is 0b), this bit must return 1b.
Reserved
Detect Changed (PDC): This bit is set when the value reported in
Presence Detect State is changed.
MRL Sensor Changed (MSC): If an MRL sensor is implemented,
this bit is set when a MRL Sensor state change is detected. If an
MRL sensor is not implemented, this bit must not be set.
Power Fault Detected (PFD): If a Power Controller that supports
power fault detection is implemented, this bit is set when the
Power Controller detects a power fault at this slot. Note that,
depending on hardware capability, it is possible that a power fault
can be detected at any time, independent of the Power Controller
Control setting or the occupancy of the slot. If power fault
detection is not supported, this bit must not be set.
Attention Button Pressed (ABP): If an Attention Button is
implemented, this bit is set when the attention button is pressed.
If an Attention Button is not supported, this bit must not be set.
264
Datasheet