AC82G41SLGQ3 Datasheet, PDF (212/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Host-PCI Express* Registers (D1:F0)
6.1.45
RSTS—Root Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/1/0/PCI
C0-C3h
00000000h
RO, R/WC
32 bits
This register provides information about PCI Express Root Complex specific
parameters.
Bit
31:18
Access
RO
17
RO
16
R/WC
15:0
RO
Default
Value
0000h
0b
0b
0000h
RST/PWR
Description
Core
Core
Core
Core
Reserved and Zero: For future R/WC/S
implementations; software must use 0 for writes to bits.
PME Pending (PMEP): This bit indicates that another
PME is pending when the PME Status bit is set. When the
PME Status bit is cleared by software; the PME is delivered
by hardware by setting the PME Status bit again and
updating the Requestor ID appropriately. The PME pending
bit is cleared by hardware if no more PMEs are pending.
PME Status (PMES): This bit indicates that PME was
asserted by the requestor ID indicated in the PME
Requestor ID field. Subsequent PMEs are kept pending
until the status register is cleared by writing a 1 to this
field.
PME Requestor ID (PMERID): This field indicates the
PCI requestor ID of the last PME requestor.
6.1.46
DCAP2—Device Capabilities 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/1/0/PCI
C4-C7h
00000000h
RO
32 bits
Bit
31:0
Access
RO
Default
Value
00000000h
RST/PWR
Core
Reserved
6.1.47
DCTL2—Device Control 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/1/0/PCI
C8-C9h
0000h
RO
16 bits
Description
Bit
15:0
Access
RO
Default
Value
0000h
RST/PWR
Core
Reserved
Description
212
Datasheet