AC82G41SLGQ3 Datasheet, PDF (266/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Host-Secondary PCI Express* Bridge Registers (D6:F0) (Intel^® 82P45 MCH Only)
8.45 RSTS—Root Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/6/0/PCI
C0–C3h
00000000h
RO, RWC
32 bits
This register provides information about PCI Express Root Complex specific
parameters.
Bit
31:18
17
16
15:0
Access
RO
RO
RWC
RO
Default
Value
0000h
0b
0b
0000h
RST/
PWR
Core
Core
Core
Core
Description
Reserved
PME Pending (PMEP): This bit indicates that another PME is
pending when the PME Status bit is set. When the PME Status bit is
cleared by software; the PME is delivered by hardware by setting the
PME Status bit again and updating the Requestor ID appropriately.
The PME pending bit is cleared by hardware if no more PMEs are
pending.
PME Status (PMES): This bit indicates that PME was asserted by the
requestor ID indicated in the PME Requestor ID field. Subsequent
PMEs are kept pending until the status register is cleared by writing a
1 to this field.
PME Requestor ID (PMERID): This field indicates the PCI requestor
ID of the last PME requestor.
8.46 PELC—PCI Express Legacy Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/6/0/PCI
EC–EFh
00000000h
RO, RW
32 bits
This register controls functionality that is needed by Legacy (non-PCI Express aware)
OSs during run time.
Bit
31:3
2
1
0
Access
RO
RW
RO
RW
Default
Value
0000000
0h
0b
0b
0b
RST/
PWR
Core
Core
Core
Core
Description
Reserved
PME GPE Enable (PMEGPE):
0 = Do not generate GPE PME message when PME is received.
1 = Generate a GPE PME message when PME is received
(Assert_PMEGPE and Deassert_PMEGPE messages on DMI). This
enables the MCH to support PMEs on the PCI Express port under
legacy OSs.
Reserved
General Message GPE Enable (GENGPE):
0 = Do not forward received GPE assert/de-assert messages.
1 = Forward received GPE assert/de-assert messages. These general
GPE message can be received via the PCI Express port from an
external Intel device and will be subsequently forwarded to the
ICH (via Assert_GPE and Deassert_GPE messages on DMI).
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Datasheet