AC82G41SLGQ3 Datasheet, PDF (295/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Integrated Graphics Registers (Device 2) (Intel^® 82Q45, 82Q43, 82B43, 82G45, 82G43, 82G41
GMCH Only)
9.1.31
PMCAPID—Power Management Capabilities ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/2/0/PCI
D0-D1h
0001h
R/WO, RO
16 bits
Bit
15:8
7:0
Access
R/WO
RO
Default
Value
00h
01h
RST/PWR
Description
Core
Core
Next Capability Pointer (NEXT_PTR): This field
contains a pointer to the next item in the capabilities list.
BIOS is responsible for writing this to the FLR Capability
when applicable.
Capability Identifier (CAP_ID): SIG defines this ID is
01h for power management.
9.1.32
PMCAP—Power Management Capabilities
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/2/0/PCI
D2-D3h
0022h
RO
16 bits
This register is a Mirror of Function 0 with the same read/write attributes. The
hardware implements a single physical register common to both Functions 0 and 1.
Bit
Access
15:11
RO
10
RO
9
RO
8:6
RO
5
RO
4
RO
3
RO
2:0
RO
Default
Value
00h
0b
0b
000b
1b
0b
0b
010b
RST/PWR
Description
Core
Core
Core
Core
Core
Core
Core
Core
PME Support (PMES): This field indicates the power
states in which the IGD may assert PME#. Hardwired to 0
to indicate that the IGD does not assert the PME# signal.
D2 Support (D2): The D2 power management state is
not supported. This bit is hardwired to 0.
D1 Support (D1): Hardwired to 0 to indicate that the D1
power management state is not supported.
Reserved
Device Specific Initialization (DSI): Hardwired to 1 to
indicate that special initialization of the IGD is required
before generic class device driver is to use it.
Reserved
PME Clock (PMECLK): Hardwired to 0 to indicate IGD
does not support PME# generation.
Version (VER): Hardwired to 010b to indicate that there
are 4 bytes of power management registers implemented
and that this device complies with the PCI Power
Management Interface Specification, Revision 1.1.
Datasheet
295