AC82G41SLGQ3 Datasheet, PDF (49/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Signal Description
Note:
2.10
Signal Name
HDMIB_INT+
HDMIC_INT-
HDMIC_INT+
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
Type
I
PCIE
I
CIE
I
PCIE
I/O
COD
I/O
COD
I/O
COD
I/O
COD
Description
Serial Digital Video Input Interrupt: Multiplexed with
EXP_RXP_3/EXP_RXP_12
Serial Digital Video Input Interrupt: Multiplexed with
EXP_RXN_7/EXP_RXN_8.
Serial Digital Video Input Interrupt: Multiplexed with
EXP_RXP_7/EXP_RXP_8.
HDMI port B Control Clock: (This pin is shared with SDVO)
HDMI port B Control Data: (This pin is shared with SDVO)
HDMI port C Control Clock: Also used as the DP CTRLCLK
HDMI port C Control Data: Also used as the DP CTRLDATA
HDMI support on 82B43 is enabled via Intel® Upgrade Service
Display Port Interface
(Intel^® 82Q45, 82Q43, 82B43, 82G45, 82G43,
82G41 GMCH Only)
Signal Name
DPB_AUX#
DPB_AUX
DPB_HDP
DPC_AUX#
DPC_AUX
DPC_HDP
DPB_LANE0#
DPB_LANE0
DPB_LANE1#
DPB_LANE1
Type
O
PCIE
O
PCIE
O
PCIE
O
PCIE
O
PCIE
O
PCIE
O
PCIE
O
PCIE
O
PCIE
O
PCIE
Description
Display Port BAux channel: Multiplexed with EXP_RXN_02
Display Port BAux channel: Multiplexed with EXP_RXP_02
Display Port B Hot Plug Detect: Multiplexed with EXP_RXP_03
Display Port C Aux channel: Multiplexed with EXP_RXN_06
Display Port C Aux channel: Multiplexed with EXP_RXP_06
Display Port C Hot Plug Detect: Multiplexed with EXP_RXP_07
Display Port B Data Lane: Multiplexed with EXP_TXN_00
Display Port B Data Lane: Multiplexed with EXP_TXP_00
Display Port B Data Lane: Multiplexed with EXP_TXN_01
Display Port B Data Lane: Multiplexed with EXP_TXP_01
Datasheet
49