AC82G41SLGQ3 Datasheet, PDF (13/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

10.9.15RSVD—Reserved .................................................................................. 392
10.9.16SS—Sub System Identifiers ................................................................... 393
10.9.17EROM—Expansion ROM Base Address...................................................... 393
10.9.18CAP—Capabilities Pointer....................................................................... 393
10.9.19INTR—Interrupt Information .................................................................. 394
10.9.20MGNT—Minimum Grant ......................................................................... 394
10.9.21MLAT—Maximum Latency ...................................................................... 394
10.9.22PID—PCI Power Management Capability ID .............................................. 395
10.9.23PC—PCI Power Management Capabilities ................................................. 395
10.9.24PMCS—PCI Power Management Control and Status ................................... 396
10.9.25MID—Message Signaled Interrupt Capability ID ........................................ 397
10.9.26MC—Message Signaled Interrupt Message Control..................................... 397
10.9.27MA—Message Signaled Interrupt Message Address.................................... 398
10.9.28MAU—Message Signaled Interrupt Message Upper Address ........................ 398
10.9.29MD—Message Signaled Interrupt Message Data ........................................ 398
10.10 KT IO/ Memory Mapped Device Registers............................................................ 399
10.10.1KTRxBR—KT Receive Buffer Register ....................................................... 399
10.10.2KTTHR—KT Transmit Holding Register ..................................................... 400
10.10.3KTDLLR—KT Divisor Latch LSB Register ................................................... 400
10.10.4KTIER—KT Interrupt Enable Register....................................................... 401
10.10.5KTDLMR—KT Divisor Latch MSB Register ................................................. 401
10.10.6KTIIR—KT Interrupt Identification Register .............................................. 402
10.10.7KTFCR—KT FIFO Control Register ........................................................... 403
10.10.8KTLCR—KT Line Control Register ............................................................ 404
10.10.9KTMCR—KT Modem Control Register ....................................................... 405
10.10.10KTLSR—KT Line Status Register ............................................................ 406
10.10.11KTMSR—KT Modem Status Register....................................................... 407
10.10.12KTSCR—KT Scratch Register................................................................. 407
11 Intel^® Trusted Execution Technology Registers
(Intel^® 82Q45 and 82Q43 GMCH Only) .................................................................. 409
11.1 Intel Trusted Execution Technology Specific Registers .......................................... 409
11.1.1 TXT.STS—TXT Status Register ............................................................... 411
11.1.2 TXT.ESTS—TXT Error Status Register ...................................................... 412
11.1.3 TXT.THREAD.EXISTS—TXT Thread Exists Register..................................... 413
11.1.4 TXT.THREADS.JOIN—TXT Threads Join Register ....................................... 414
11.1.5 TXT.ERRORCODE (AKA TXT.CRASH)—TXT Error Code Register ................... 415
11.1.6 TXT.CMD.RESET—TXT System Reset Command........................................ 415
11.1.7 TXT.CMD.CLOSE-PRIVATE—TXT Close Private Command ........................... 415
11.1.8 TXT.DID—TXT Device ID Register ........................................................... 416
11.1.9 TXT.CMD.FLUSH-WB—TXT Flush Write Buffer Command ............................ 416
11.1.10TXT.SINIT.MEMORY.BASE—TXT SINIT Code Base Register ......................... 416
11.1.11TXT.SINIT.MEMORY.SIZE—TXT SINIT Memory Size Register ...................... 417
11.1.12TXT.MLE.JOIN—TXT MLE Join Base Register ............................................. 417
11.1.13TXT.HEAP.BASE—TXT Heap Base Register ............................................... 418
11.1.14TXT.HEAP.SIZE—TXT Heap Size Register ................................................. 418
11.1.15TXT.MSEG.BASE—TXT MSEG Base Register.............................................. 418
11.1.16TXT.MSEG.SIZE—TXT MSEG Size Address Register ................................... 419
11.1.17TXT.SCRATCHPAD.0—TXT Scratch Pad 0 Register ..................................... 419
11.1.18TXT.SCRATCHPAD.1—TXT Scratch Pad 1 Register ..................................... 419
11.1.19TXT.DPR—DMA Protected Range............................................................. 420
11.1.20TXT.CMD.OPEN.LOCALITY1—TXT Open Locality 1 Command ...................... 420
11.1.21TXT.CMD.CLOSE.LOCALITY1—TXT Close Locality 1 Command..................... 421
11.1.22TXT.CMD.OPEN.LOCALITY2—TXT Open Locality 2 Command ...................... 421
11.1.23TXT.CMD.CLOSE.LOCALITY2—TXT Close Locality 2 Command..................... 421
Datasheet
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