AC82G41SLGQ3 Datasheet, PDF (220/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Direct Memory Interface Registers (DMIBAR)
7.1
Bit
31:20
19:16
15:0
7.2
Bit
31:7
6:4
3
2:0
DMIVCECH—DMI Virtual Channel Enhanced
Capability
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/DMIBAR
0-3h
04010002h
RO
32 bits
This register indicates DMI Virtual Channel capabilities.
Access
RO
RO
RO
Default
Value
040h
1h
0002h
RST/PWR
Description
Core
Core
Core
Pointer to Next Capability (PNC): This field contains
the offset to the next PCI Express capability structure in
the linked list of capabilities (Link Declaration Capability).
PCI Express Virtual Channel Capability Version
(PCIEVCCV): Hardwired to 1 to indicate compliances with
the 1.1 version of the PCI Express specification.
NOTE: This version does not change for 2.0 compliance.
Extended Capability ID (ECID): Value of 0002h
identifies this linked list item (capability structure) as
being for PCI Express Virtual Channel registers.
DMIPVCCAP1—DMI Port VC Capability Register 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
0/0/0/DMIBAR
4-7h
00000001h
RO, R/WO
32 bits
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
Access
RO
RO
RO
R/WO
Default
Value
0000000h
000b
0b
001b
RST/PWR
Description
Core
Core
Core
Core
Reserved
Low Priority Extended VC Count (LPEVCC): This field
indicates the number of (extended) Virtual Channels in
addition to the default VC belonging to the low-priority VC
(LPVC) group that has the lowest priority with respect to
other VC resources in a strict-priority VC Arbitration.
The value of 0 in this field implies strict VC arbitration.
Reserved
Extended VC Count (EVCC): This field indicates the
number of (extended) Virtual Channels in addition to the
default VC supported by the device.
The Private Virtual Channel is not included in this count.
220
Datasheet