AC82G41SLGQ3 Datasheet, PDF (44/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Signal Description
Signal Name
SLPB
ICH_SYNCB
ALLZTEST
XORTEST
CEN
ITPM_ENB
DualX8_Enable
BSCANTEST
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
Type
Description
O
HVCMOS
O
HVCMOS
I
GTL+
I
GTL+
I
GTL+
I
GTL+
I
GTL+
I
GTL+
I/O
SSTL
I/O
SSTL
I/O
SSTL
I/O
SSTL
Advanced Power Management Signal
ICH Sync Signal
All Z Test: This signal is used for Chipset Bed of Nails testing
to execute All Z Test. It is used as output for XOR Chain
testing.
XOR Chain Test: This signal is used for Chipset Bed of Nails
testing to execute XOR Chain Test.
TLS Confidentiality Enable:
0 = Disable TLS
1 = Enable TLS
Integrated TPM Enable:
0 = Enable Intel TPM
1 = Disable Intel TPM
NOTE: This signal is not used on the 82G45, 82G43, 82G41
GMCH and 82P45, 82P43 MCH.
2x8 PEG Port Bifurcation:
0 = 2x8 PCI Express Ports Enabled
1 = 1x16 PCI Express Port Enabled
Boundary Scan Test Enable: This signal is used to enter
Boundary Scan mode
JTAG Clock
JTAG Data In
JTAG Data Out
JTAG Test Mode Select
2.7
Direct Media Interface
Signal Name
DMI_RXP_[3:0]
DMI_RXN_[3:0]
DMI_TXP_[3:0]
DMI_TXN_[3:0]
Type
I
DMI
O
DMI
Description
Direct Media Interface: Receive differential pair (RX).
(G)MCH-ICH serial interface input.
Direct Media Interface: Transmit differential pair (TX).
(G)MCH-ICH serial interface output.
44
Datasheet