AC82G41SLGQ3 Datasheet, PDF (348/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

Intel^® Manageability Engine Subsystem Registers
10.5
IDE Function for Remote Boot and Installations PT
IDER Registers
Table 21.
IDE Function for remote boot and Installations PT IDER Register Address Map
Address Register
Offset
Symbol
Register Name
Default
Value
Access
0–3h
4–5h
6–7h
8h
9–Bh
Ch
Dh
10–13h
14–17h
18–1Bh
1C–1Fh
20–23h
2C–2Fh
30–33h
34h
3C–3Dh
3Eh
3Fh
C8–C9h
CA–CBh
CC–CFh
D0–D1h
D2–D3h
D4–D7h
D8–DBh
DC–DDh
ID
CMD
STS
RID
CC
CLS
MLT
PCMDBA
PCTLBA
SCMDBA
SCTLBA
LBAR
SS
EROM
CAP
INTR
MGNT
MLAT
PID
PC
PMCS
MID
MC
MA
MAU
MD
Identification
Command Register
Device Status
Revision ID
Class Codes
Cache Line Size
Master Latency Timer
Primary Command Block IO Bar
Primary Control Block Base Address
Secondary Command Block Base Address
Secondary Control Block base Address
Legacy Bus Master Base Address
Sub System Identifiers
Expansion ROM Base Address
Capabilities Pointer
Interrupt Information
Minimum Grant
Maximum Latency
PCI Power Management Capability ID
PCI Power Management Capabilities
2E068086h
0000h
00B0h
see register
description
010185h
00h
00h
00000001h
00000001h
00000001h
00000001h
00000001h
00008086h
00000000h
C8h
0300h
00h
00h
D001h
0023h
PCI Power Management Control and Status 00000000h
Message Signaled Interrupt Capability ID
Message Signaled Interrupt Message
Control
Message Signaled Interrupt Message
Address
Message Signaled Interrupt Message Upper
Address
Message Signaled Interrupt Message Data
0005h
0080h
00000000h
00000000h
0000h
RO
RO, R/W
RO
RO
RO
RO
RO
RO, R/W
RO, R/W
RO, R/W
RO, R/W
RO, R/W
R/WO
RO
RO
R/W, RO
RO
RO
RO
RO
RO, R/W,
RO/V
RO
RO, R/W
R/W, RO
RO, R/W
R/W
348
Datasheet