AC82G41SLGQ3 Datasheet, PDF (7/604 Pages) Intel Corporation – Intel® 4 Series Chipset Family

6.1.20 PMLIMITU1—Prefetchable Memory Limit Address Upper ............................. 189
6.1.21 CAPPTR1—Capabilities Pointer................................................................ 189
6.1.22 INTRLINE1—Interrupt Line .................................................................... 190
6.1.23 INTRPIN1—Interrupt Pin........................................................................ 190
6.1.24 BCTRL1—Bridge Control ........................................................................ 191
6.1.25 PM_CAPID1—Power Management Capabilities .......................................... 193
6.1.26 PM_CS1—Power Management Control/Status ........................................... 194
6.1.27 SS_CAPID—Subsystem ID and Vendor ID Capabilities ............................... 195
6.1.28 SS—Subsystem ID and Subsystem Vendor ID .......................................... 196
6.1.29 MSI_CAPID—Message Signaled Interrupts Capability ID ............................ 196
6.1.30 MC—Message Control............................................................................ 197
6.1.31 MA—Message Address........................................................................... 198
6.1.32 MD—Message Data ............................................................................... 198
6.1.33 PEG_CAPL—PCI Express-G Capability List ................................................ 198
6.1.34 PEG_CAP—PCI Express-G Capabilities ..................................................... 199
6.1.35 DCAP—Device Capabilities ..................................................................... 199
6.1.36 DCTL—Device Control ........................................................................... 200
6.1.37 DSTS—Device Status ............................................................................ 201
6.1.38 LCAP—Link Capabilities ......................................................................... 202
6.1.39 LCTL—Link Control ............................................................................... 204
6.1.40 LSTS—Link Status ................................................................................ 206
6.1.41 SLOTCAP—Slot Capabilities.................................................................... 208
6.1.42 SLOTCTL—Slot Control .......................................................................... 209
6.1.43 SLOTSTS—Slot Status........................................................................... 210
6.1.44 RCTL—Root Control .............................................................................. 211
6.1.45 RSTS—Root Status ............................................................................... 212
6.1.46 DCAP2—Device Capabilities 2................................................................. 212
6.1.47 DCTL2—Device Control 2....................................................................... 212
6.1.48 DSTS2—Device Status 2 ....................................................................... 213
6.1.49 LCAP2—Link Capabilities 2..................................................................... 213
6.1.50 LCTL2—Link Control 2 ........................................................................... 214
6.1.51 LSTS2—Link Status 2............................................................................ 216
6.1.52 SCAP2—Slot Capabilities 2..................................................................... 217
6.1.53 SCTL2—Slot Control 2........................................................................... 217
6.1.54 SSTS2—Slot Status 2............................................................................ 217
6.1.55 PEGLC—PCI Express-G Legacy Control .................................................... 218
7 Direct Memory Interface Registers (DMIBAR) ....................................................... 219
7.1 DMIVCECH—DMI Virtual Channel Enhanced Capability .......................................... 220
7.2 DMIPVCCAP1—DMI Port VC Capability Register 1 ................................................. 220
7.3 DMIPVCCAP2—DMI Port VC Capability Register 2 ................................................. 221
7.4 DMIPVCCTL—DMI Port VC Control...................................................................... 221
7.5 DMIVC0RCAP—DMI VC0 Resource Capability ....................................................... 222
7.6 DMIVC0RCTL0—DMI VC0 Resource Control ......................................................... 222
7.7 DMIVC0RSTS—DMI VC0 Resource Status............................................................ 223
7.8 DMIVC1RCAP—DMI VC1 Resource Capability ....................................................... 224
7.9 DMIVC1RCTL1—DMI VC1 Resource Control ......................................................... 224
7.10 DMIVC1RSTS—DMI VC1 Resource Status............................................................ 226
7.11 DMILCAP—DMI Link Capabilities ........................................................................ 227
7.12 DMILCTL—DMI Link Control .............................................................................. 228
7.13 DMILSTS—DMI Link Status ............................................................................... 228
8
Host-Secondary PCI Express* Bridge Registers (D6:F0) (Intel^® 82P45 MCH Only) 229
8.1 VID1—Vendor Identification.............................................................................. 231
8.2 DID1—Device Identification .............................................................................. 232
8.3 PCICMD1—PCI Command ................................................................................. 232
Datasheet
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