SH7706 Datasheet, PDF (95/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 2 CPU
Instruction Code
MSB
LSB
Fx: 0000
MD: 00
Fx: 0001
MD: 01
Fx: 0010
MD: 10
Fx: 0011 to 1111
MD: 11
0100 Rn Fx 0000 SHLL
Rn
DT
Rn
SHAL
Rn
0100 Rn Fx 0001 SHLR Rn
CMP/PZ Rn
SHAR Rn
0100 Rn Fx 0010 STS.L MACH,@-Rn
STS.L MACL,@-Rn
STS.L PR,@-Rn
0100 Rn 00MD 0011 STC.L SR,@-Rn
STC.L GBR,@-Rn
STC.L VBR,@-Rn
STC.L SSR,@-Rn
0100 Rn 01MD 0011 STC.L SPC,@-Rn
0100 Rn 10MD 0011 STC.L
R0_BANK,@-Rn STC.L
R1_BANK,@-Rn STC.L
R2_BANK,@-Rn STC.L
Rn
R3_BANK,@-
0100 Rn 11MD 0011 STC.L
R4_BANK,@-Rn STC.L
R5_BANK,@-Rn STC.L
R6_BANK,@-Rn STC.L
Rn
R7_BANK,@-
0100 Rn Fx 0100 ROTL Rn
ROTCL Rn
0100 Rn Fx 0101 ROTR Rn
CMP/PL Rn
ROTCR Rn
0100 Rm Fx 0110 LDS.L @Rm+,MACH LDS.L @Rm+,MACL LDS.L @Rm+,PR
0100 Rm 00MD 0111 LDC.L @Rm+,SR
LDC.L @Rm+,GBR
LDC.L @Rm+,VBR
LDC.L @Rm+,SSR
0100 Rm 01MD 0111 LDC.L @Rm+,SPC
0100 Rm 10MD 0111 LDC.L
@Rm+,R0_BANK LDC.L
@Rm+,R1_BANK LDC.L
@Rm+,R2_BANK LDC.L
ANK
@Rm+,R3_B
0100 Rm 11MD 0111 LDC.L
@Rm+,R4_BANK LDC.L
@Rm+,R5_BANK LDC.L
@Rm+,R6_BANK LDC.L
ANK
@Rm+,R7_B
0100 Rn Fx 1000 SHLL2 Rn
SHLL8 Rn
SHLL16 Rn
0100 Rn Fx 1001 SHLR2 Rn
SHLR8 Rn
SHLR16 Rn
0100 Rm Fx 1010 LDS
Rm,MACH
LDS
Rm,MACL
LDS
Rm,PR
0100 Rm/
Rn
Fx 1011 JSR
@Rm
TAS.B @Rn
JMP
@Rm
0100 Rn Rm 1100 SHAD
Rm,Rn
0100 Rn Rm 1101 SHLD
Rm,Rn
0100 Rm 00MD 1110 LDC
Rm,SR
LDC
Rm,GBR
LDC
Rm,VBR
LDC
Rm,SSR
0100 Rm 01MD 1110 LDC
Rm,SPC
0100 Rm 10MD 1110 LDC
Rm,R0_BANK LDC
Rm,R1_BANK LDC
Rm,R2_BANK LDC
Rm,R3_BANK
0100 Rm 11MD 1110 LDC
Rm,R4_BANK LDC
Rm,R5_BANK LDC
Rm,R6_BANK LDC
Rm,R7_BANK
0100 Rn Rm 1111 MAC.W @Rm+,@Rn+
0101 Rn Rm disp MOV.L
@(disp:4,Rm),Rn
0110 Rn Rm 00MD MOV.B @Rm,Rn
MOV.W @Rm,Rn
MOV.L @Rm,Rn
MOV
Rm,Rn
0110 Rn Rm 01MD MOV.B @Rm+,Rn
MOV.W @Rm+,Rn
MOV.L @Rm+,Rn
NOT
Rm,Rn
Rev. 5.00 May 29, 2006 page 47 of 698
REJ09B0146-0500