SH7706 Datasheet, PDF (242/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 8 Bus State Controller (BSC)
Bit
Bit Name
15 to 8 —
Initial Value R/W
All 0
R
7
CMF
0
R/W
6
CMIE
0
R/W
5
CKS2
0
R/W
4
CKS1
0
R/W
3
CKS0
0
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Compare Match Flag
The CMF status flag indicates that the values of
RTCNT and RTCOR match.
0: The values of RTCNT and RTCOR do not
match.
Clear condition: When a refresh is performed
After 0 has been written in CMF and RFSH = 1
and RMODE = 0 (to perform a CBR refresh).
1: The values of RTCNT and RTCOR match.
Set condition: RTCNT = RTCOR*
Note: * Contents don’t change when 1 is written to
CMF.
Compare Match Interrupt Enable
Enables or disables an interrupt request caused
when the CMF of RTCSR is set to 1. Do not set
this bit to 1 when using auto-refresh.
0: Disables an interrupt request caused by CMF
1: Enables an interrupt request caused by CMF
Clock Select Bits
Select the clock input to RTCNT. The source clock
is the external bus clock (CKIO). The RTCNT
count clock is CKIO divided by the specified ratio.
RTCOR should be set before setting CKS2 to
CKS0.
000: Disables clock input
001: Bus clock (CKIO)/4
010: CKIO/16
011: CKIO/64
100: CKIO/256
101: CKIO/1024
110: CKIO/2048
111: CKIO/4096
Rev. 5.00 May 29, 2006 page 194 of 698
REJ09B0146-0500