SH7706 Datasheet, PDF (593/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 19 A/D Converter (ADC)
19.6.5 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGE1, TRGE0 bits in ADCR are set to 1.
external trigger input is enabled at the ADTRG pin. A high-to-low transition at the ADTRG pin
sets the ADST bit in ADCSR to 1, starting A/D conversion. Other operations, regardless of the
conversion mode, are the same as if the ADST bit had been set to 1 by software. Figure 19.9
shows the timing.
Pφ
ADTRG
External
trigger signal
ADST
A/D conversion
Figure 19.9 External Trigger Input Timing
19.7 Interrupt Requests
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request can be enabled or disabled by the ADIE bit in ADCSR.
19.8 Definitions of A/D Conversion Accuracy
The A/D converter compares an analog value input from an analog input channel to its analog
reference value and converts it into 10-bit digital data. The absolute accuracy of this A/D
conversion is the deviation between the input analog value and the output digital value. It includes
the following errors:
• Offset error
• Full-scale error
• Quantization error
• Nonlinearity error
These four error quantities are explained below using figure 19.10. In the figure, the 10 bits of the
A/D converter have been simplified to 3 bits.
Rev. 5.00 May 29, 2006 page 545 of 698
REJ09B0146-0500