SH7706 Datasheet, PDF (363/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 11 Watchdog Timer (WDT)
Section 11 Watchdog Timer (WDT)
The WDT is a single-channel timer that counts the clock settling time and is used when clearing
software standby mode and temporary standbys, such as frequency changes. It can also be used as
an ordinary watchdog timer or interval timer.
Figure 11.1 shows a block diagram of the WDT.
Standby
cancellation
Internal
reset
request
Interrupt
request
Standby
control
WDT
Reset
control
Interrupt
control
Clock selection
Overflow
Divider
Clock selector
Clock
WTCSR
WTCNT
Bus interface
Standby
mode
Peripheral
clock
Legend:
WTCSR: Watchdog timer control/status register
WTCNT: Watchdog timer counter
Figure 11.1 Block Diagram of the WDT
11.1 Feature
The WDT has the following features:
• Can be used to ensure the clock setting time: Use the WDT to cancel software standby mode
and the temporary standbys that occur when the clock frequency is changed.
• Can switch between watchdog timer mode and interval timer mode.
• Generates internal resets in watchdog timer mode: Internal resets occur after counter overflow.
Selection of power-on reset or manual reset.
• Generates interrupts in interval timer mode: Internal timer interrupts occur after counter
overflow.
• Selection of eight counter input clocks. Eight clocks (×1 to × 1/4096) can be obtained by
dividing the peripheral clock.
Rev. 5.00 May 29, 2006 page 315 of 698
REJ09B0146-0500