SH7706 Datasheet, PDF (509/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Table 16.3 lists examples of SCBRR2 settings.
Table 16.3 Bit Rates and SCBRR2 Settings
Bit Rate (bit/s) n
110
2
150
2
300
1
600
1
1200
0
2400
0
4800
0
9600
0
19200
0
31250
0
38400
0
7.3728
N
Error (%) n
130 –0.07 2
95
0.00
2
191 0.00
1
95
0.00
1
191 0.00
0
95
0.00
0
47
0.00
0
23
0.00
0
11
0.00
0
6
5.33
0
5
0.00
0
Pφ (MHz)
8
N
Error (%) n
141 0.03
1
103 0.16
1
207 0.16
0
103 0.16
0
207 0.16
0
103 0.16
0
51
0.16
0
25
0.16
0
12
0.16
0
7
0.00
0
6
–6.99 0
9.8304
N
Error (%)
174 –0.26
127 0.00
255 0.00
127 0.00
255 0.00
127 0.00
63 0.00
31 0.00
15 0.00
9
–1.70
1
0.00
Bit Rate (bit/s) n
110
2
150
2
300
2
600
1
1200
1
2400
0
4800
0
9600
0
19200
0
31250
0
38400
0
10
N
Error (%) n
177 –0.25 1
129 0.16
1
64
0.16
1
129 0.16
0
64
0.16
0
129 0.16
0
64
0.16
0
32
–1.36 0
15
1.73
0
9
0.00
0
7
1.73
0
Pφ (MHz)
12
N
Error (%) n
212 0.03
2
155 0.16
2
77
0.16
2
155 0.16
1
77
0.16
1
38
0.16
0
19
0.16
0
9
0.16
0
4
0.16
0
2
0.00
0
9
–2.34 0
12.288
N
Error (%)
217 0.08
159 0.00
79 0.00
159 0.00
79 0.00
159 0.00
79 0.00
39 0.00
19 0.00
11 2.40
9
0.00
Rev. 5.00 May 29, 2006 page 461 of 698
REJ09B0146-0500