 English |
|
|
|
|
|
|
|
| SH7706 Datasheet, PDF (674/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series | |||
| |||
| ◁ |
Section 24 Electrical Characteristics
T1
Tw
Tw
T2
CKIO
A25 to A0
CSn
RD/WR
RD
(read)
D31 to D0
(read)
WEn
(write)
D31 to D0
(write)
BS
DACKn
tAD
tAS
tCSD1
tRWD
tRSD
tWED
tWDD1
tBSD
tDAKD1
tBSD
tWTS tWTH
tWTS tWTH
tAD
tCSD2
tAH
tRWH
tRDH1 tRWD
tRSD
tAH
tRWH
tRDS1
tRDH1
tWED
tAH
tRWH
tWDH3
tWDH1
tDAKD2
WAIT
Note: tRDH1: Stipulated from the faster negate timing of CSn or RD
tAH: Stipulated from the slower negate timing of CSn, RD, or WEn
Figure 24.18 Basic Bus Cycle (External Wait)
Rev. 5.00 May 29, 2006 page 626 of 698
REJ09B0146-0500
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese