SH7706 Datasheet, PDF (489/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Section 16 Serial Communication Interface with FIFO
(SCIF)
This LSI has single-channel serial communication interface with FIFO (SCIF) that supports
asynchronous serial communication. It also has 16-stage FIFO registers for both transfer and
receive that enables this LSI efficient high-speed continuous communication. Figure 16.1 shows a
diagram of the SCIF, and figures 16.2 to 16.4 show the I/O ports.
16.1 Feature
• Asynchronous serial communication
 Serial data communications are performed by start-stop in character units. The SCI can
communicate with a universal asynchronous receiver/transmitter (UART), an asynchronous
communication interface adapter (ACIA), or any other communications chip that employs
a standard asynchronous serial system. There are eight selectable serial data
communication formats.
 Data length: Seven or eight bits
 Stop bit length: One or two bits
 Parity: Even, odd, or none
 Receive error detection: Parity and framing errors
 Break detection:
• Full duplex communication
The transmitting and receiving sections are independent, so the SCI can transmit and receive
simultaneously. Both sections use 16-stage FIFO buffering, so high-speed continuous data
transfer is possible in both the transmit and receive directions.
• On-chip baud rate generator with selectable bit rates
• Internal or external transmit/receive clock source
From either baud rate generator (internal) or SCK2 pin (external)
• Four types of interrupts
Transmit-FIFO-data-empty, break, receive-FIFO-data-full, and receive-error interrupts are
requested independently. The direct memory access controller (DMAC) can be activated to
execute a data transfer by a transmit-FIFO-data-empty or receive-FIFO-data-full interrupt.
• When the SCIF is not in use, it can be stopped by halting the clock supplied to it, saving
power.
• On-chip modem control functions (RTS2 and CTS2)
Rev. 5.00 May 29, 2006 page 441 of 698
REJ09B0146-0500