SH7706 Datasheet, PDF (737/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Appendix
PCMCIA Memory Interface
(Area 6)
PCMCIA/IO Interface
(Area 6)
8-Bit
8-Bit
Bus
16-Bit Bus Width
Bus
16-Bit Bus Width
Pin
Width
Width
Byte/
Word/
Longword
Access
Byte
Access
(Address
2n)
Byte
Access
(Address
2n + 1)
Byte/
Word/
Word/
Longword
Longword
Access
Access
Byte
Access
(Address
2n)
Byte
Word/
Access
Longword
(Address
Access
2n+1)
CS6 to CS2, CS0
Enabled Enabled High
Enabled Enabled Enabled High
Enabled
RD
R Low
Low
Low
Low
High
High
High
High
W High
High
High
High
High
High
High
High
RD/WR
R High
High
High
High
High
High
High
High
W Low
Low
Low
Low
Low
Low
Low
Low
BS
Enabled Enabled Enabled Enabled Enabled Enabled Enabled Enabled
RASU/PTD[1]
High
High
High
High
High
High
High
High
RASL/PTD[0]
High
High
High
High
High
High
High
High
CASL/PTD[2]
High
High
High
High
High
High
High
High
CASU/PTD[3]
High
High
High
High
High
High
High
High
WE0/DQMLL
R High
High
High
High
High
High
High
High
W High
High
High
High
High
High
High
High
WE1/WE/DQMLU
R High
High
High
High
High
High
High
High
W Low
Low
Low
Low
High
High
High
High
WE2/ICIORD/
DQMUL/PTC[1]
R High
W High
High
High
High
High
High
High
Low
High
Low
High
Low
High
Low
High
WE3/ICIOWR/
DQMUU/PTC[2]
R High
W High
High
High
High
High
High
High
High
Low
High
Low
High
Low
High
Low
CE2A/PTD[6]
High
High
High
High
High
High
High
High
CE2B/PTD[7]
High
High
Low
Low
High
High
Low
Low
CKE
WAIT
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Enabled^*1
IOIS16
Disabled Disabled Disabled Disabled Disabled Disabled Enabled Enabled
A25 to A0
Address Address Address Address Address Address Address Address
D7 to D0
Valid data Valid
data
Invalid
data
Valid
data
Valid
data
Valid
data
Invalid
data
Valid
data
D15 to D8
Hi-Z^*2
Invalid
data
Valid
data
Valid
data
Hi-Z^*2
Invalid
data
Valid
data
Valid
data
D31 to D16
Hi-Z^*2
Hi-Z^*2
Hi-Z^*2
Hi-Z^*2
Hi-Z^*2
Hi-Z^*2
Hi-Z^*2
Hi-Z^*2
Notes: 1. Disabled when WCR2 register wait setting is 0.
2. Unused data pins should be switched to the port function, or pulled up or down.
Rev. 5.00 May 29, 2006 page 689 of 698
REJ09B0146-0500