SH7706 Datasheet, PDF (19/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Item
Section 22 Power-
Down Modes
Table 22.1 Power-
Down Modes
Page
568
22.3.3 Module
576
Standby Function
Transition to Module
Standby Function
24.3.1 Clock Timing 615
Figure 24.4 Power-
On Oscillation Settling
Time
Revision (See Manual for Details)
Table amended and note 5 added
Mode
Module
standby
function
Transition
Conditions
Set MSTP bit of
STBCR to 1^*5
State
CPG CPU
Runs Runs
*⁴
CPU
Reg-
ister
Held
On-Chip
Memory
Held
On-Chip
Peripheral
Modules Pins
Specified ^*2
module
halts
External
Memory
Refresh
Canceling
Procedure
1. Clear MSTP
bit to 0
2. Power-on
reset
Note: 5. If the realtime clock (RTC) is set to module standby
mode (bit 1 in standby control register (STBCR) set to 1) before
any register in the RTC, SCI, or TMU is accessed, registers in
the serial communication interface (SCI) or timer unit (TMU)
may not be read properly. To avoid this problem, access (read
or write) any register in the RTC, SCI, or TMU once or more
before setting the RTC to module standby mode.
Description added
If the realtime clock (RTC) is set to module standby mode (bit 1
in standby control register (STBCR) set to 1) before any
register in the RTC, SCI, or TMU is accessed, registers in the
serial communication interface (SCI) or timer unit (TMU) may
not be read properly. To avoid this problem, access (read or
write) any register in the RTC, SCI, or TMU once or more
before setting the RTC to module standby mode.
Figure amended
CKIO,
internal clock
V_CC
V_CC – RTC
V_CC – PLL1
V_CC – PLL2
V_CC min
t_OSC1
RESETP
Rev. 5.00 May 29, 2006 page xix of xlviii