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SH7706 Datasheet, PDF (594/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series
Section 19 A/D Converter (ADC)
Offset error is the deviation between actual and ideal A/D conversion characteristics when the
digital output value changes from the minimum (zero voltage) 0000000000 (000 in the figure) to
000000001 (001 in the figure) (figure 19.10, item (1)). Full-scale error is the deviation between
actual and ideal A/D conversion characteristics when the digital output value changes from the
1111111110 (110 in the figure) to the maximum 1111111111 (111 in the figure) (figure 19.10,
item (2)). Quantization error is the intrinsic error of the A/D converter and is expressed as 1/2 LSB
(figure 19.10, item (3)). Nonlinearity error is the deviation between actual and ideal A/D
conversion characteristics between zero voltage and full-scale voltage (figure 19.10, item (4)).
Note that it does not include offset, full-scale or quantization error.
Digital output
111
110
Ideal A/D
conversion
characteristics
Digital output
Ideal A/D
conversion
characteristics
(2) Full-scale error
101
100
(4) Nonlinearity
011
error
010
(3) Quantization
error
001
000
0 1/8 2/8 3/8 4/8 5/8 6/8 7/8 FS
Analog input
Legend:
voltage
FS: Full-scale voltage
Actual A/D
convertion
characteristics
(1) Offset error
FS
Analog input
voltage
Figure 19.10 Definitions of A/D Conversion Accuracy
19.9 Usage Note
When using the A/D converter, note the points listed in section 19.9.1 below.
19.9.1 Setting Analog Input Voltage
• Analog Input Voltage Range: During A/D conversion, the voltages input to the analog input
pins ANn should be in the range AVSS ≤ ANn ≤ AVCC (n = 0 to 3).
• AVCC, AVSS, Input Voltage: AVCC and AVSS should be related as follows: AVCC = VCCQ ±
0.2 V and AVSS = VSS.
Rev. 5.00 May 29, 2006 page 546 of 698
REJ09B0146-0500