SH7706 Datasheet, PDF (719/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Reset
Category
Pin
Power-On Manual
Reset
Reset
SCIF with
FIFO
Port
RxD2/SCPT[2]
Z
TxD2/SCPT[2]
Z
SCK2/SCPT[3]
V
RTS2/SCPT[4]
V
CTS2/IRQ5/SCPT[5] V^*8
CE2B/PTD[7]
H
CE2A/PTD[6]
H
ZI^*7
ZO^*7
ZP^*3
OP^*3
ZI^*7
OP^*3
OP^*3
IOIS16/PTD[5]
I
I
ADTRG/PTG[5]
V^*8
I
H-UDI
TCK/PTG[1]
IV
I
TDI/PTG[0]
IV
I
TMS/PTG[2]
IV
I
TRST/PTG[3]
IV
AUDSYNC/PTF[4]
OV
TDO/PTF[5]
OV
I
OP^*3
OP^*3
AUDCK/PTG[4]
IV
I
AUDATA[3:0]/PTF[3:0] IV
ASEBRKAK/PTF[6] OV
I
OP^*3
ASEMD0
I
I
Analog
AN[1:0]/PTJ[1:0]
Z
ZI^*7
AN[3:2]/DA[0:1]/
Z
ZI^*7
PTJ[3:2]
Legend:
I: Input
O: Output
H: High-level output
L: Low-level output
Z: High impedance
P: Input or output depending on register setting
K: Input pin is high impedance, output pin holds the state
V: I/O buffer off, pullup MOS on
Power-Down
Standby Sleep
Z
ZK^*3
ZK^*3
ZK^*3
IZ^*6
OZ^*6
IOP^*5
OP^*3
I
ZH^*11 K^*3
ZH^*11 K^*3
I
OP^*3
OP^*3
Z
I
IZ
I
IZ
I
IZ
I
IZ
I
IZ
OK^*3
OK^*3
I
OP^*3
OP^*3
IZ
I
IZ
OP^*3
I
OP^*3
Z
I
Z
OZ^*2
I
IO^*9
Appendix
Bus
Released
IZ^*6
OZ^*6
IOP^*5
OP^*3
I
ZP^*3
ZP^*3
I
I
I
I
I
I
OP^*3
OP^*3
I
I
OP^*3
I
I
IO^*9
Rev. 5.00 May 29, 2006 page 671 of 698
REJ09B0146-0500