SH7706 Datasheet, PDF (58/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 1 Overview
Number of Pins
FP-176C TBP-208A
107
L16
Pin Name
DRAK0/PTE[2]
108
L17
DRAK1/PTE[3]
109
K15
110
K16
111
K17
112
J14
113
J16
AUDATA[0]/PTF[0]
AUDATA[1]/PTF[1]
AUDATA[2]/PTF[2]
AUDATA[3]/PTF[3]
AUDSYNC/PTF[4]
114
J17
115
J15
116
H17
117
H16
118
G16
119
G15
120
G14
TDI/PTG[0]
V_SS
TCK/PTG[1]
V_CC
TMS/PTG[2]
TRST/PTG[3]
TDO/PTF[5]
121
F16
122
F15
123
E17
124
E16
125
E15
126
E14
127
D17
128
D16
129
C17
130
C16
131
B17
132
B16
ASEBRKAK/PTF[6]
ASEMD0^*3
V_CC-PLL1^*2
CAP1
V_SS-PLL1^*2
V_SS-PLL2^*2
CAP2
V_CC-PLL2^*2
MD1
V_SS
XTAL
EXTAL
I/O
O / I/O
O / I/O
I/O
I/O
I/O
I/O
O / I/O
I
—
I
—
I
I
O / I/O
O / I/O
I
—
—
—
—
—
—
I
—
O
I
Description
DMA request acknowledge /
input/output port E
DMA request acknowledge /
input/output port E
AUD data / input/output port F
AUD data / input port F
AUD data / input/output port F
AUD data / input/output port F
AUD synchronous /
input/output port F
Data input (H-UDI) / input port G
Internal power supply (0 V)
Clock (H-UDI) / input port G
Internal power supply (1.9 V)
Mode select (H-UDI) / input port G
Reset (H-UDI) / input port G
Data output (H-UDI) /
input/output port F
ASE break acknowledge (H-UDI) /
input/output port F
ASE mode (H-UDI)
PLL1 power supply (1.9 V)
PLL1 external capacitance pin
PLL1 power supply (0 V)
PLL2 power supply (0 V)
PLL2 external capacitance pin
PLL2 power supply (1.9 V)
Clock mode setting
Internal power supply (0 V)
Clock oscillator pin
External clock / crystal oscillator pin
Rev. 5.00 May 29, 2006 page 10 of 698
REJ09B0146-0500